Part Number Hot Search : 
MAZ7330 R8DLXA FEP16BTA 6121A SZ108C 550T008M 14066BP KBPC1
Product Description
Full Text Search
 

To Download ISD1016AG Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  1? information storage devices, inc. 1 features easy-to-use single-chip voice record/play- back solution high-quality, natural voice/audio reproduction manual switch or microcontroller compatible playback can be edge- or level- activated single-chip durations of 16 and 20 seconds directly cascadable for longer durations power-down mode ? m a standby current (typical) zero-power message storage eliminates battery backup circuits fully addressable to handle multiple messages 100-year message retention (typical) 100,000 record cycles (typical) on-chip clock source no algorithm development required single +5 volt supply available in die form, dip, and soic packaging industrial temperature (-40 c to +85 c) version available isd1000a series single-chip voice record/playback devices 16- and 20-second durations isd1000a series summary part number duration (seconds) input sample rate (khz) typical filter pass band (khz) isd1016a 16 8 3.4 isd1020a 20 6.4 2.7 06.databook_1000a dsht page 1 friday, september 27, 1996 10:44 am
product data sheets isd1000a series 1? - 1 general description information storage devices?isd1000a chip- corder series provides high-quality, single-chip record/playback solutions for 16- and 20-second messaging applications. the cmos devices include an on-chip oscillator, microphone pream- plifier, automatic gain control, antialiasing filter, smoothing filter, and speaker amplifier. in addi- tion, the isd1000a series is fully microprocessor- compatible, allowing complex messaging and addressing to be achieved. recordings are stored in on-chip nonvolatile memory cells, providing zero-power message storage. this unique, single-chip solution is made possible through isd's patented multilevel stor- age technology. voice and audio signals are stored directly into memory in their natural form, providing high-quality, solid-state voice reproduc- tion. detailed description the isd1000a chipcorder series devices are designed to record and play back audio and voice information in a single chip with a minimum of circuit complexity. this compact, easy-to-use, nonvolatile, low-power solution has been made possible by isd's multilevel storage technology a breakthrough in storage technology in eeprom. isd? multilevel storage technology results in stor- age density that is eight times greater than digital memory. the isd1000a nonvolatile analog array consists of 128k cells ?the equivalent of 1 mbits of digital storage. the isd1000a series eliminates the need for dig- ital conversion, digital compression, and voice synthesis techniques which often compromise voice quality and are more complicated to use. the isd1000a series includes signal conditioning circuits and control functions which enable a com- plete, high-quality recording and playback sys- tem in a single device. the isd1000a is available in two versions, which store voice in 16- or 20-sec- ond arrays. additional devices may be cascaded isd1000a series block diagram amp timing internal clock pre- amp v cca v ccd power conditioning a0 a2 a3 a4 a5 a7 a6 address buffers ana in ana out mic mic ref agc analog transceivers decoders 128 k cell nonvolatile multilevel storage array amp sampling clock pd p/r ce eom device control xclk aux in sp+ sp mux v ssa v ssd a1 automatic gain control (agc) 5-pole active antialiasing filter 5-pole active smoothing filter r 06.databook_1000a dsht page 2 friday, september 27, 1996 10:44 am
product data sheets isd1000a series 1? 1 to achieve longer recording durations. the non- volatile storage array is based on production- proven, low-power cmos eeprom technology. the highly integrated isd1000a series contains all the basic functions required for high-quality voice recording and playback. the noise-cancel- ling microphone preamplifier and automatic gain control (agc) record both low-volume and high- volume sounds. the agc attack and release times are adjusted by an external resistor and capacitor. antialiasing is performed by a continu- ous fifth-order chebyshev filter, requiring no exter- nal components or clocks to give toll-quality reproduction. the low corner of the passband is user-settable by two external capacitors. the devices contain their own temperature-stabilized timebase oscillator. the isd1000a devices drive a speaker directly through differential outputs. this boosts power by four times and eliminates the need for a series capacitor or an output amplifier. the device will operate from a single power supply or from batter- ies. the device also includes a power down func- tion for applications where minimum power consumption is critical. the cmos-based design, combined with the nonvolatile storage array, assures the lowest possible overall power con- sumption. on-chip control functions make the isd1000a series very easy to use in a wide array of applica- tions. each device offers a variety of operating modes and interface options. the devices may be used in applications that require little more than a few switches and a battery. the devices may also be integrated into electronic systems where digital addresses can be provided for more sophisti- cated message addressing and control. the isd1000a array is organized into 160 segments. addresses a0 through a7 provide access to each segment in the array for message addressing. addressing provides the capability of construct- ing messages by combining stored phrases and sounds. pin descriptions voltage inputs (v cca , v ccd ) to minimize noise, the analog and digital circuits in the isd1000a series devices use separate power busses. these voltage busses are brought out to separate pins and should be tied together as close to the supply as possible. in addition, these supplies should be decoupled as close to the package as possible. ground inputs (v ssa , v ssd ) the isd1000a series of devices utilizes separate analog and digital ground busses. these pins should be tied together as close to the package as possible and connected through a low-imped- ance path to power supply ground. power down input (pd) when not recording or playing back, the pd pin should be pulled high to place the part in a very low power mode (see i sb specification). when eom pulses low for an overflow condition, pd should be brought high to reset the address pointer back to the beginning of the record/play- back space. ssd ssa m0/a0 m1/a1 m2/a2 m3/a3 m4/a4 m5/a5 nc nc a6 a7 aux in v v sp+ v p/r xclk eom pd ce nc ana out ana in agc mic ref mic v sp? ccd cca dip/soic 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 isd1000a series pinouts 06.databook_1000a dsht page 3 friday, september 27, 1996 10:44 am
product data sheets isd1000a series 1? - 1 chip enable input (ce ) the ce pin is taken low to enable all playback and record operations. the address inputs and playback/record input (p/r ) are latched by the falling edge of ce . when ce is taken high, the isd1000a is unselected, the p/r is high, and the auxiliary input is directed into the speaker ampli- fier. playback/record input (p/r ) the p/r input is latched by the falling edge of the ce pin. a high level selects a playback cycle while a low level selects a record cycle. for a record cycle, the address inputs provide the starting address and recording continues until pd or ce is pulled high or an overflow is detected (i.e. the chip is full). when a record cycle is termi- nated by pulling pd or ce high, an end-of-mes- sage (eom) marker is stored at the current address in memory. for a playback cycle, the address inputs provide the starting address and the device will play until an eom marker is encountered. the device can continue past an eom marker in an operational mode, or if ce is held low in address mode. (see page 1-6 for more operational modes). end-of-message output (eom ) a non-volatile marker is automatically inserted at the end of each recorded message. it remains there until the message is recorded over. during playback, the eom output pulses low for a period of t eom at the end of each message, or in the event of a message overflow (device full). in addition, the isd1000a series has an internal v cc detect circuit to maintain message integrity should v cc fall below 3.5v. in this case, eom goes low and the device is fixed in playback- only mode. the eom marker provides a conve- nient handshake signal for a processor, and also facilitates the cascading of devices. microphone input (mic) the microphone input transfers its signal to the on-chip preamplifier. an on-chip automatic gain control (agc) circuit controls the gain of this preamplifier from -15 to 24 db. an external micro- phone should be ac coupled to this pin via a series capacitor. the capacitor value, together with the internal 10 kohm resistance on this pin, determines the low-frequency cutoff for the isd1000a series passband. see isd? applica- tion notes and design manual in this book for additional information on low-frequency cutoff cal- culation. microphone reference input (mic ref) the mic ref input is the inverting input to the microphone preamplifier. this provides a noise- canceling or common-mode rejection input to the device when connected to a differential micro- phone. if this input is unused , it must be left disconnected . automatic gain control input (agc) the agc dynamically adjusts the gain of the preamplifier to compensate for the wide range of microphone input levels. the agc allows the full range of whispers to loud sounds to be recorded with minimal distortion. the ?ttack?time is deter- mined by the time constant of a 5 k w internal resistance and an external capacitor (c2) con- nected from the agc pin to v ssa analog ground. the ?elease?time is determined by the time con- stant of an external resistor (r2) and an external capacitor (c2 on the schematic on page 1-17) connected in parallel between the agc pin and v ssa analog ground. nominal values of 470 k w and 4.7 m f give satisfactory results, in most cases. for agc voltages of 1.5v and below, the pream- plifier is at its maximum gain of 24 db. reduction in preamplifier gain occurs for voltages of approx- imately 1.8v. 06.databook_1000a dsht page 4 friday, september 27, 1996 10:44 am
product data sheets isd1000a series 1? 1 analog output (ana out) this pin provides the preamplifier output to the user. the voltage gain of the preamplifier is deter- mined by the voltage level at the agc pin. it has a maximum gain of about 24 db for small input sig- nal levels. analog input (ana in) the analog input pin transfers its signal to the chip for recording. for microphone inputs, the ana out pin should be connected via an external capacitor to the ana in pin. this capacitor value, together with the 2.7 k w input impedance of ana in, is selected to give additional cutoff at the low- frequency end of the voice passband. if the desired input is derived from a source other than a microphone, the signal can be fed, capacitively coupled, into the ana in pin directly. optional external clock input (xclk) isd1000a devices are configured at the factory with an internal sampling clock frequency cen- tered to 1% of specification. the frequency is maintained to a total variation of 2.25% toler- ance over the entire commercial temperature and 4.5 to 5.5 voltage ranges. the internal clock has a 5% tolerance over the industrial temperature range and 4.5 to 5.5 voltage range. a regulated power supply is recommended for industrial-tem- perature-range parts. if greater precision is required, the device can be clocked through the xclk pin as follows. these recommended clock rates should not be varied because the antialiasing and smoothing fil- ters are fixed, and aliasing problems can occur if the sample rate differs from the one recom- mended. the duty cycle on the input clock is not critical, as the clock is immediately divided by two. if the xclk is not used , this input must be connected to ground . speaker outputs (sp+/sp-) all devices in the isd1000a series include an on- chip differential speaker driver, capable of driving 50 milliwatts into 16 w from aux in (12.2 mw from memory). the speaker outputs are held at v ssa levels during record and power down. it is therefore not possi- ble to parallel speaker outputs of multiple isd1000a devices or the outputs of other speaker drivers. note connection of speaker outputs in parallel may cause damage to the device. while a single output may be used alone (includ- ing a coupling capacitor between the sp pin and the speaker), these outputs may be used individ- ually with the output signal taken from either pin. using the differential outputs results in a 4:1 improvement in output power. note never ground or drive an output. auxiliary input (aux in) the auxiliary input is multiplexed through to the output amplifier and speaker output pins when ce is high and playback has ended, or if the device is in overflow. when cascading multiple isd1000a devices, the aux in pin is used to connect a play- back signal from a following device to the previous output speaker drivers. for noise consid- erations, it is suggested that the auxiliary input not be driven when the storage array is active. address/mode inputs (ax/mx) the address/mode inputs provide two functions in the isd1000a series: 1. message address (either part number sample rate required clock isd1016a 8.0 khz 1024 khz isd1020a 6.4 khz 819.2 khz 06.databook_1000a dsht page 5 friday, september 27, 1996 10:44 am
product data sheets isd1000a series 1? - 1 a6 or a7 = low) and 2. isd1000a series opera- tional mode options (a6 and a7 = high). operational mode options are shown in the oper- ational modes table. there are a maximum of 160 message addresses (or segments). each seg- ment corresponds to one of 160 rows in the ana- log storage array. the message addresses (segments) are in locations 0 through 159 contig- uous. the playback/record duration of each seg- ment depends upon the device and is as follows: an operation may be started at any address, as defined by address pins a0-a7. record or play- back continues with automatic incrementing of the internal on-chip address until either ce is brought high (record), an end of message marker is encountered (playback with ce high), or an over- flow (device full) condition results. operational modes the isd1000a series is designed with several built-in operational modes provided to allow max- imum functionality with a minimum of additional components, described in detail below. the oper- ational modes use the address pins on the isd1000a devices, but are mapped outside the valid address range. when the two most signifi- cant bits (msbs) are high (a6 = a7=1), the remaining address signals are interpreted as mode bits and not as address bits. therefore, operational modes and direct addressing are not compatible and cannot be used simultaneously. there are two important considerations for using operational modes. first, all operations begin ini- tially at address 0, which is the beginning of the isd1000a address space. later operations can begin at other address locations, depending on the operational mode(s) chosen. in addition, the address pointer is reset to 0 when the device is changed from record to playback, or when a power-down cycle is executed. second, an operational mode is executed when ce goes low and the two msbs are high. this operational mode remains in effect until the next part number segment playback/record duration isd1016a 100 milliseconds isd1020a 125 milliseconds control mode function typical use jointly compatible* m0 message cueing fast-forward through messages m4, m5 m1 delete eom markers position eom marker at the end of the last message m3, m4, m5 m2 cascading adding devices to extend message m3 looping continuous playback from address 0 m1, m5 m4 consecutive addressing record/play multiple consecutive mes- sages m0, m1, m5 m5 ce level-activated allow message pausing m0, m1, m3, m4 operational modes table note: an asterisk (*) indicates additional operational modes which can be used simultaneously with the given mode. 06.databook_1000a dsht page 6 friday, september 27, 1996 10:44 am
product data sheets isd1000a series 1? 1 low-going ce signal, at which point the current address/mode levels are sampled and executed. note the two msbs are on pins 9 and 10 for each isd1000a series member. operational modes description the operational modes can be used in conjunc- tion with a microcontroller, or they can be hard- wired to provide the desired system operation. m0 ?message cueing message cueing allows the user to skip through messages, without knowing the actual physical addresses of each message. each ce low pulse causes the internal address pointer to skip to the next message. this mode should be used for playback only, and is typically used with the m4 operational mode. m1 ?delete eom markers the m1 operational mode allows sequentially recorded messages to be combined into a single message with only one eom marker set at the end of the combined message. when this operational mode is configured, messages recorded sequen- tially are played back as one continuous mes- sage. m2 ?used for cascading during playback, eom goes low at array over- flow only. normal eom pulses are turned off. m3 ?message looping the m3 operational mode allows for the auto- matic, continuously repeated playback of the message located at the beginning of the address space. a message cannot completely fill the isd1000a device and loop. m4 ?consecutive addressing during normal operations, the address pointer will reset when a message is played through to an eom marker. the m4 operational mode inhibits the address pointer reset on eom, allowing mes- sages to be played back consecutively. m5 ?ce level activated the default mode for isd1000a devices is for ce to be edge-activated on playback and level-acti- vated on record. the m5 operational mode causes the ce pin to be interpreted as level-acti- vated as opposed to edge-activated during play- back. this is specifically useful for terminating playback operations using the ce signal. in this mode, ce low begins a playback cycle at the beginning of device memory. 06.databook_1000a dsht page 7 friday, september 27, 1996 10:44 am
1? product data sheets isd1000a series - 1 timing diagrams record playback a0-a7 ce mic ana in t ce t pdh t set t hold sp+/- pd t pud don't care don't care don't care don't care t set p/r t rec don't care a0-a9 ce t ce t set t hold pd sp+/ eom t pud t eom don't care don't care don't care don't care t set p/r t pdh t play don't care mic ana in a0-a7 06.databook_1000a dsht page 8 friday, september 27, 1996 10:44 am
product data sheets isd1000a series 1? 1 absolute maximum ratings (packaged parts) note: stresses above those listed may cause permanent damage to the device. exposure to the absolute maximum ratings may affect device reliability. functional operation is not implied at these conditions. condition value junction temperature 150 c storage temperature range ?5 c to +150 c voltage applied to any pin (v ss ?0.3 v) to (v cc + 0.3 v) voltage applied to any pin (input current limited to 20 ma) (v ss ?1.0 v) to (v cc + 1.0 v) lead temperature (soldering ? 10 seconds) 300 c v cc - v ss ?0.3 v to + 7.0 v operating conditions (packaged parts) notes: 1. case temperature. 2. v cc = v cca = v ccd . 3. v ss = v ssa = v ssd . condition value commercial operating temperature range (1) 0 c to +70 c industrial operating temperature (1) ?0 c to +85 c supply voltage (v cc ) (2) +4.5 v to +5.5 v ground voltage (v ss ) (3) 0 v dc parameters (packaged parts) symbol parameters min (2) typ (1) max (2) units conditions v il input low voltage 0.8 v v cc = 4.5 v to 5.5 v v ih input high voltage 2.0 v v ol output low voltage 0.4 v i ol = 4.0 ma v oh output high voltage 2.4 v i oh = ?1.6 ma, v cc = 4.5 v to 5.5 v v oh1 output high voltage v cc ?.4 v i oh = ?10 m a i cc v cc current (operating) 25 30 ma r ext = (3) i sb v cc current (standby) 1 10 m a (3) i il input leakage current 1 m a r ext output load impedance 16 w speaker load r mic preamp in input resistance 10 k w pins 17, 18 r aux aux input resistance 10 k w v cc = 4.5 v to 5.5 v 06.databook_1000a dsht page 9 friday, september 27, 1996 10:44 am
1?0 product data sheets isd1000a series - 1 notes: 1. typical values @ t a = 25 c and 5.0 v. 2. all min/max limits are guaranteed by isd via electrical testing or characterization. not all specifications are 100% tested. 3. v cca and v ccd connected together. ac parameters (packaged parts) r ana in ana in input resistance 3.0 k w a pre1 preamp gain 1 24 db agc = 0.0 v, v cc = 4.5 v to 5.5 v a pre2 preamp gain 2 45 15 db agc = 2.5 v a aux aux in/ sp+ gain 0.9 v/v v cc = 4.5 v to 5.5 v a arp ana in to sp+/- gain 22 db r agc agc output resistance 5 k w i preh preamp out source ?1 ma @ v out = 1.0 v, v cc = 4.5 v to 5.5 v i prel preamp in sink 0.8 ma @ v out = 2.0 v, v cc = 4.5 v to 5.5 v symbol characteristic min (2) typ (1) max (2) units conditions f s internal clock isd1016a sampling frequency isd1020a 8 6.4 khz khz (9) (9) f cf filter pass band isd1016a ?isd1020a 3.4 2.7 khz khz 3 db roll-off point (3)(10) 3 db roll-off point (3)(10) t rec record duration isd1016a ?isd1020a 16 20 sec sec t play playback duration isd1016a ?isd1020a 16 20 sec sec (9) (9) t ce ce pulse width isd1016a ?isd1020a 100 100 nsec nsec t set control/address setup time isd1016a ?isd1020a 300 300 nsec nsec t hold control/address hold time isd1016a ?isd1020a 0 0 nsec nsec t pud power-up delay isd1016a ?isd1020a 18.75 31.25 msec msec symbol parameters min (2) typ (1) max (2) units conditions dc parameters (packaged parts) ?continued 06.databook_1000a dsht page 10 friday, september 27, 1996 10:44 am
1?1 product data sheets isd1000a series 1 notes: 1. typical values @ t a = 25 c and 5.0 v. 2. all min/max limits are guaranteed by isd via electrical testing or characterization. not all specifications are 100% tested. 3. low-frequency cutoff depends upon value of external capacitors (see pin descriptions). 4. from aux in; if ana in is driven at 50 mv p-p, the pout= 12.2 mw, typical. 5. with 5.1 k w series resistor at ana in. 6. this is the minimum pulse width required to guarantee that a record cycle will be interrupted. a low-going pd pulse of less than this interval during record may be ignored. 7. this is the minimum pulse width required to guarantee that a playback cycle will be interrupted. a low-going pd pulse of less than this interval during playback may be ignored. 8. this is the minimum pulse width required to reset the device when in a static condition; i.e., not actively recording or playing back. 9. sampling frequency and playback duration will vary as much as 2.25% over the commercial temperature and voltage range and 5% over the industrial temperature and voltage range. for greater stability, an external clock can be utilized (see pin descriptions). 10. filter specification applies to the antialiasing filter and to the smoothing filter. t pdr pd pulse width - record isd1016a ?isd1020a 25 31.25 msec msec (6) (6) t pdp pd pulse width - play isd1016a ?isd1020a 12.5 15.625 msec msec (7) (7) t pds pd pulse width - static isd1016a ?isd1020a 100 100 nsec nsec (8) (8) t pdh power down hold isd1016a ?isd1020a 0 0 nsec nsec t eom eom pulse width isd1016a ?isd1020a 12.5 15.6 msec msec thd total harmonic distortion isd1016a ?isd1020a 1 1 % % @ 1 khz @ 1 khz p out speaker output power isd1016a ?isd1020a 12.5 12.5 50 50 mw mw r ext = 16 w (4) r ext = 16 w (4) v out voltage across speaker pins isd1016a ?isd1020a 2.5 2.5 v p? v p? r ext = 600 w r ext = 600 w v in1 mic input voltage isd1016a ?isd1020a 20 20 mv mv peak-to-peak (5) peak-to-peak (5) v in2 ana in input voltage isd1016a ?isd1020a 50 50 mv mv peak-to-peak peak-to-peak v in3 aux in input voltage isd1016a ?isd1020a 1.25 1.25 v p? v p? r ext = 16 w r ext = 16 w symbol characteristic min (2) typ (1) max (2) units conditions ac parameters (packaged parts) ?continued 06.databook_1000a dsht page 11 friday, september 27, 1996 10:44 am
1?2 product data sheets isd1000a series - 1 typical parameter variation with voltage and temperature (packaged parts) -40 25 20 15 10 5 0 25 70 85 operating current (ma) temperature (c) -40 25 70 85 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 standby current ( m a) temperature (c) -40 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 25 70 85 percent change (%) temperature (c) -40 0.6 0.5 0.4 0.3 0.2 0.1 0 25 70 85 percent distortion (%) temperature (c) total harmonic distortion oscillator stability record mode operating current (i cc ) standby current (i sb ) 5.5 volts 4.5 volts 06.databook_1000a dsht page 12 friday, september 27, 1996 10:44 am
product data sheets isd1000a series 1?3 1 absolute maximum ratings (die) note: stresses above those listed may cause permanent damage to the device. exposure to the absolute maximum ratings may affect device reliability. functional operation is not implied at these conditions. condition value junction temperature 150 c storage temperature range ?5 c to +150 c voltage applied to any pad (v ss ?0.3 v) to (v cc + 0.3 v) voltage applied to any pad (input current limited to 20 ma) (v ss ?1.0 v) to (v cc + 1.0 v) v cc - v ss ?0.3 v to + 7.0 v operating conditions (die) notes: 1. case temperature. 2. v cc = v cca = v ccd . 3. v ss = v ssa = v ssd . condition value commercial operating temperature range (1) 0 c to +50 c supply voltage (v cc ) (2) +4.5 v to +6.5 v ground voltage (v ss ) (3) 0 v dc parameters (die) symbol parameters min (2) typ (1) max (2) units conditions v il input low voltage 0.8 v v cc = 4.5 v to 5.5 v v ih input high voltage 2.0 v v ol output low voltage 0.4 v i ol = 4.0 ma v oh output high voltage 2.4 v i oh = ?.6 ma, v cc = 4.5 v to 5.5 v v oh1 output high voltage v cc ?.4 v i oh = ?10 m a i cc v cc current (operating) 25 30 ma r ext = (3) i sb v cc current (standby) 1 10 m a (3) i il input leakage current 1 m a r ext output load impedance 16 w speaker load r mic preamp in input resistance 10 k w pins 17, 18 r aux aux input resistance 10 k w v cc = 4.5 v to 5.5 v r ana in ana in input resistance 3.0 k w 06.databook_1000a dsht page 13 friday, september 27, 1996 10:44 am
product data sheets isd1000a series 1?4 - 1 notes: 1. typical values @ t a = 25 c and 5.0 v. 2. all min/max limits are guaranteed by isd via electrical testing or characterization. not all specifications are 100% tested. 3. v cca and v ccd connected together. ac parameters (die) a pre1 preamp gain 1 24 db agc = 0.0 v, v cc = 4.5 v to 5.5 v a pre2 preamp gain 2 45 15 db agc = 2.5 v a aux aux in/ sp+ gain 0.9 v/v v cc = 4.5 v to 5.5 v a arp ana in to sp+/- gain 22 db r agc agc output resistance 5 k w i preh preamp out source ?1 ma @ v out = 1.0 v, v cc = 4.5 v to 5.5 v i prel preamp in sink 0.8 ma @ v out = 2.0 v, v cc = 4.5 v to 5.5 v symbol characteristic min (2) typ (1) max (2) units conditions f s internal clock isd1016a sampling frequency isd1020a 8 6.4 khz khz (9) (9) f cf filter pass band isd1016a ?isd1020a 3.4 2.7 khz khz 3 db roll-off point (3)(10) 3 db roll-off point (3)(10) t rec record duration isd1016a ?isd1020a 16 20 sec sec t play playback duration isd1016a ?isd1020a 16 20 sec sec (9) (9) t ce ce pulse width isd1016a ?isd1020a 100 100 nsec nsec t set control/address setup time isd1016a ?isd1020a 300 300 nsec nsec t hold control/address hold time isd1016a ?isd1020a 0 0 nsec nsec t pud power-up delay isd1016a ?isd1020a 18.75 31.25 msec msec t pdr pd pulse width - record isd1016a ?isd1020a 25 31.25 msec msec (6) (6) symbol parameters min (2) typ (1) max (2) units conditions dc parameters (die) ?continued 06.databook_1000a dsht page 14 friday, september 27, 1996 10:44 am
product data sheets isd1000a series 1?5 1 notes: 1. typical values @ t a = 25 c and 5.0 v. 2. all min/max limits are guaranteed by isd via electrical testing or characterization. not all specifications are 100% tested. 3. low-frequency cutoff depends upon value of external capacitors (see pin descriptions). 4. from aux in; if ana in is driven at 50 mv p-p, the pout= 12.2 mw, typical. 5. with 5.1 k w series resistor at ana in. 6. this is the minimum pulse width required to guarantee that a record cycle will be interrupted. a low-going pd pulse of less than this interval during record may be ignored. 7. this is the minimum pulse width required to guarantee that a playback cycle will be interrupted. a low-going pd pulse of less than this interval during playback may be ignored. 8. this is the minimum pulse width required to reset the device when in a static condition; i.e., not actively recording or playing back. 9. sampling frequency and playback duration will vary as much as 2.25% over the commercial temperature and voltage range. for greater stability, an external clock can be utilized (see pin descriptions). 10. filter specification applies to the antialiasing filter and to the smoothing filter. t pdp pd pulse width - play isd1016a ?isd1020a 12.5 15.625 msec msec (7) (7) t pds pd pulse width - static isd1016a ?isd1020a 100 100 nsec nsec (8) (8) t pdh power down hold isd1016a ?isd1020a 0 0 nsec nsec t eom eom pulse width isd1016a ?isd1020a 12.5 15.6 msec msec thd total harmonic distortion isd1016a ?isd1020a 1 1 % % @ 1 khz @ 1 khz p out speaker output power isd1016a ?isd1020a 12.5 12.5 50 50 mw mw r ext = 16 w (4) r ext = 16 w (4) v out voltage across speaker pins isd1016a ?isd1020a 2.5 2.5 v p? v p? r ext = 600 w r ext = 600 w v in1 mic input voltage isd1016a ?isd1020a 20 20 mv mv peak-to-peak (5) peak-to-peak (5) v in2 ana in input voltage isd1016a ?isd1020a 50 50 mv mv peak-to-peak peak-to-peak v in3 aux in input voltage isd1016a ?isd1020a 1.25 1.25 v p? v p? r ext = 16 w r ext = 16 w symbol characteristic min (2) typ (1) max (2) units conditions ac parameters (die) ?continued 06.databook_1000a dsht page 15 friday, september 27, 1996 10:44 am
1?6 product data sheets isd1000a series - 1 typical parameter variation with voltage and temperature (die) 0.5 0.4 0.3 0.2 0.1 0 02550 02550 -1.5 2.5 1.5 1.0 0.5 0 -0.5 -1.0 2.0 25 20 15 10 5 0 02550 02550 0 0.8 0.6 0.5 0.4 0.3 0.2 0.1 0.7 6.5 volts 5.5 volts 4.5 volts operating current (ma) temperature (c) standby current ( m a) temperature (c) percent change (%) temperature (c) percent distortion (%) temperature (c) total harmonic distortion oscillator stability record mode operating current (i cc ) standby current (i sb ) 06.databook_1000a dsht page 16 friday, september 27, 1996 10:44 am
1?7 product data sheets isd1000a series 1 ssd ssa a0 a1 a2 a3 a4 a5 a6 a7 ce pd p/r eom xclk v v v v sp+ sp? aux in ana in ana out mic ref mic agc ccd cca c 3 16 w speaker 1 2 3 4 5 6 9 10 23 24 27 25 26 28 16 12 13 14 15 11 20 21 18 17 19 electret microphone 0.1 m f cc v cc v 22 m f ss v playback/record power down chip enable isd1016a/1020a 0.1 m f 0.1 m f c 5 0.1 m f mic ref c 1 0.1 m f cc v c 2 4.7 m f 470 k w r 2 1 k w r 1 10 k w r 3 c 4 220 m f (note) r 5 5.1 k w 10 k w r 4 c7 c6 c8 application example ?design schematic application example ?basic device control control step function action 1 power up chip and select record/playback mode 1. pd = low 2. p/r = as desired 2 set message address for record/playback set addresses a0?7 3 begin playback/record ce = pulsed low (playback) ce = held low (record) 4 end cycle ce = high and eom reached note: if desired, pin 18 may be left unconnected (microphone preamplifier noise will be higher). in this case, pin 18 must not be tied to any other signal or voltage. additional design example schematics are provided in the application notes and design manual in this book. 06.databook_1000a dsht page 17 friday, september 27, 1996 10:44 am
product data sheets isd1000a series 1?8 - 1 application example ?passive component functions part function comments r1 microphone power supply decoupling reduces power supply noise r2 release time constant sets release time for agc r3, r4 microphone biasing resistors provides biasing for microphone operation r5 series limiting resistor reduces level at high supply voltages c1, c5 microphone dc?locking capacitor low-frequency cutoff decouples microphone bias from chip. provides single-pole low-frequency cutoff and common-mode noise rejection c2 attack/release time constant sets attack/release time for agc c3 low-frequency cutoff capacitor provides additional pole for low-frequency cutoff c4 microphone power supply decoupling reduces power supply noise c6, c7, c8 power supply capacitors filter and bypass of power supply 06.databook_1000a dsht page 18 friday, september 27, 1996 10:44 am
1?9 product data sheets isd1000a series 1 isd1000a series duration: 16 = 16 seconds 20 = 20 seconds special temperature field: blank = commercial packaged (0?c to +70?c) or commercial die (0?c to +50?c) i = industrial (-40?c to +85?c) package type: g = 28-lead 0.350-inch small outline integrated circuit (soic) p = 28-lead 0.600-inch plastic dual in-line package (pdip) x = die ordering information part number part number ISD1016AG isd1020ag ISD1016AGi isd1020agi isd1016ap isd1020ap isd1016api isd1020api isd1016ax isd1020ax isd10 _ _ a _ _ product number descriptor key when ordering isd1000a series devices, please refer to the following valid part numbers. for the latest product information, access isd? worldwide website at http://www.isd.com. 06.databook_1000a dsht page 19 friday, september 27, 1996 10:44 am
1?0 product data sheets isd1000a series - 1 06.databook_1000a dsht page 20 friday, september 27, 1996 10:44 am


▲Up To Search▲   

 
Price & Availability of ISD1016AG

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X